Shahid Beheshti University
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Last Update: 2018/10/02
Keyvan Navi
Professor

Faculty: Computer Engineering and Science
Department: Architecture of Computer Systems
Phone: +98 (21) 29902286
Email: navi@sbu.ac.ir
Personal website: http://facultymembers.sbu.ac.ir/navi/

Academic Degrees

PhD, , , France.


Journal Articles
1. A. Bozorgmehr, M. Moaiyeri, K. Navi, N. Bagherzadeh, "Ultra-Efficient Fuzzy Min/Max Circuits Based on Carbon Nanotube FETs" , IEEE TRANSACTIONS ON FUZZY SYSTEMS, Vol.26, pp.1073-1078, 2018.
2. F. Sharifi rostam abadi, A. Panahi, M. Moaiyeri, H. Sharifi rostamabadi, K. Navi, "High Performance CNFET-based Ternary Full Adders" , IETE JOURNAL OF RESEARCH, Vol.64, pp.108-115, 2018.
3. N. Hajizadeh bastani, M. Moaiyeri, K. Navi, "An Energy and Area Efficient Approximate Ternary Adder Based on CNTFET Switching Logic" , CIRCUITS SYSTEMS AND SIGNAL PROCESSING, Vol.37, pp.1863-1883, 2018.
4. A. Arasteh, M. Moaiyeri, M. Taheri, K. Navi, B. Nader, "An Energy and Area Efficient 42 Compressor Based on FinFETs" , INTEGRATION-THE VLSI JOURNAL, Vol.60, pp.224-231, 2018.
5. M. Maleknejad, R. Faghih mirzaee, K. Navi, H. Naji, "A capacitive multi-threshold threshold gate design to reach a high-performance PVT-tolerant 42 compressor by carbon nanotube FETs" , ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, Vol.94, pp.233-246, 2018.
6. N. Bagherzadeh, F. Danehdaran, M. Khosroshahy, K. Navi, "Design and Power Analysis of New Coplanar One-Bit Full-Adder Cell in Quantum-Dot Cellular Automata" , Journal of Low Power Electronics, Vol.14, pp.38-48, 2018.
7. A. Adami, S. Hamidi sangdehi, K. Navi, H. Hoseinzadeh, "All optical fan out able half adder circuit based on nonlineardirectional coupler" , OPTIK, Vol.141, pp.114-123, 2017.
8. A. Baradaran, K. Navi, "CAST-WSN The Presentation of New Clustering Algorithm Based on Steiner Tree and C-Means Algorithm Improvement in Wireless Sensor Networks" , WIRELESS PERSONAL COMMUNICATIONS, Vol.97, pp.1323-1344, 2017.
9. B. Mohammad, S. Mohammadyan, B. Nader, K. Navi, "A novel low power Exclusive-OR via cell level-based design function in quantum cellular automata" , Journal of Computational Electronics, Vol.16, pp.875-882, 2017.
10. H. Hasanpour, S. Asadi, R. Ghavamizadeh meibodi, A. Daraeian, A. Ahmadiani, J. Shams, K. Navi, "A critical appraisal of heterogeneity in Obsessive-Compulsive Disorder using symptom-based clustering analysis" , Asian Journal of Psychiatry, Vol.28, pp.89-96, 2017.
11. H. Sharifi rostamabadi, S. Hamidi sangdehi, K. Navi, "All-optical photonic crystal logic gates using nonlinear directional coupler" , Photonics and Nanostructures-Fundamentals and Applications, Vol.27, pp.55-63, 2017.
12. M. Taherkhani, K. Navi, R. Van meter, "Resource-aware system architecture model for implementation of quantum aided Byzantine agreement on quantum repeater networks" , Quantum Science and Technology, Vol.3, pp.1-25, 2017.
13. M. Bagherian khosroshahy, M. Moaiyeri, A. Shaahin, B. Nader, K. Navi, "Quantum-Dot Cellular Automata Circuits with Reduced External Fixed Inputs" , MICROPROCESSORS AND MICROSYSTEMS, Vol.50, pp.154-163, 2017.
14. M. Bagherian khosroshahy, M. Moaiyeri, K. Navi, N. Bagherzadeh, "An Energy and Cost Efficient Majority-Based RAM Cell in Quantum-dot Cellular Automata" , Results in Physics, Vol.7, pp.3543-3551, 2017.
15. M. Jahangir, K. Navi, "Optimized Reversible Square Root Circuit" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.14, pp.2307-2314, 2017.
16. M. Moaiyeri, R. Afshin, F. Sharifi rostam abadi, K. Navi, "Design and Evaluation of Energy-Efficient Carbon Nanotube FET-Based Quaternary Minimum and Maximum Circuits" , JOURNAL OF APPLIED RESEARCH AND TECHNOLOGY, Vol.15, pp.233-241, 2017.
17. M. Samdaliri, R. Faghih mirzaee, K. Navi, N. Bagherzadeh, "A Single Parity-Check Digit for One Trit Error Detection in Ternary Communication Systems Gate-Level and Transistor-Level Designs." , JOURNAL OF MULTIPLE-VALUED LOGIC AND SOFT COMPUTING, Vol.29, pp.303-326, 2017.
18. M. Samdaliri, R. Mirzaee, K. Navi, N. Bagherzadeh, "High-performance ternary operators for scrambling" , INTEGRATION-THE VLSI JOURNAL, Vol.59, pp.1-9, 2017.
19. N. Kazemifard, K. Navi, "Implementing RNS Arithmetic unit through Single Electron Quantum-dot Cellular Automata" , International Journal of Computer Applications, Vol.163, pp.20-27, 2017.
20. S. Tabrizchi, A. Panahi, F. Sharifi rostam abadi, K. Navi, N. Bagherzadeh, "Method for designing ternary adder cells based on CNFETs" , IET Circuits Devices and Systems, Vol.11, pp.465-470, 2017.
21. Z. Zahra, P. Keshavarziyan, K. Navi, "Low-power high-speed 1-bit inexact Full Adder cell designs applicable to low-energy image processing" , INTERNATIONAL JOURNAL OF ELECTRONICS, Vol.105, pp.375-384, 2017.
22. H. Hasanpour, S. Asadi, R. Ghavamizadeh meybodi, A. Daraeian, A. Ahmadiani, J. Shams, K. Navi, "A critical appraisal of heterogeneity in Obsessive-Cpmpulsive Disorder using symptom-based clustering analysis" , Asian Journal of Psychiatry, pp.89-96, 2017.
23. N. Hajizadeh bastani, M. Moaiyeri, K. Navi, "Carbon Nanotube FET Switching Logic for Designing Efficient Ternary Arithmetic Circuits" , Journal of Nanoelectronics and Optoelectronics, Vol.11, pp.118-129, 2017.
24. S. Tabrizchi, N. Azimi, K. Navi, "A novel ternary half adder and multiplier based on carbon nanotube field effect transistors" , Frontiers of Information Technology and Electronic Engineering, Vol.18, pp.423-433, 2017.
25. Z. Rouhani, S. Angizi, M. Taheri, K. Navi, N. Bagherzadeh, "Towards Approximate Computing with Quantum-Dot Cellular Automata" , Journal of Low Power Electronics, Vol.13, pp.29-35, 2017.
26. A. Nadian ghomshe, Y. Hasanian, K. Navi, "Intrinsic Image Decomposition via Structure-Preserving Image Smoothing and Material Recognition" , PLoS One, Vol.11, pp.1-22, 2016.
27. A. Panahi, F. Sharifi rostam abadi, M. Moaiyeri, K. Navi, "CNFET-Based Approximate Ternary Adders for Energy-Efficient Image Processing Applications" , MICROPROCESSORS AND MICROSYSTEMS, Vol.47, pp.454-465, 2016.
28. F. Sharifi rostam abadi, A. Panahi, H. Sharifi, K. Navi, N. Bagherzadeh, H. Thapliyal, "Design of quaternary 4 2 and 5 2 compressors for nanotechnology" , COMPUTERS and ELECTRICAL ENGINEERING, Vol.56, pp.64-74, 2016.
29. F. Sharifi rostam abadi, M. Moaiyeri, K. Navi, N. Bagherzadeh, "Ultra-Low-Power Carbon Nanotube FET-based Quaternary Logic Gates" , INTERNATIONAL JOURNAL OF ELECTRONICS, Vol.103, pp.1524-1537, 2016.
30. M. Bagherian khosroshahy, M. Samdaliri, A. Abdoli, K. Navi, N. Bagherzadeh, "A 3D universal structure based on molecular-QCA and CNT technologies" , JOURNAL OF MOLECULAR STRUCTURE, Vol.1119, pp.86-95, 2016.
31. M. Jahangir, K. Navi, "A Novel Reversible Adder/Subtractor with Overflow Detection" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.13, pp.1-6, 2016.
32. M. Moaiyeri, N. Khastoo, M. Nassiri, K. Navi, N. Bagherzadeh, "An Efficient Analog-to-Digital Converter Based on Carbon Nanotube FETs" , Journal of Low Power Electronics, Vol.12, pp.150-157, 2016.
33. M. Moaiyeri, S. Sedighiani, F. Sharifi rostam abadi, K. Navi, "Design and Analysis of Carbon Nanotube FET-Based Quaternary Full Adders" , Frontiers of Information Technology and Electronic Engineering, Vol.17, pp.1056-1066, 2016.
34. M. Moonesan, R. Faghih mirzaee, M. Samdaliri, K. Navi, "Robust fuzzy SRAM for accurate and ultra-low-power MVL and fuzzy logic applications" , ELECTRONICS LETTERS, Vol.52, pp.2032-2034, 2016.
35. M. Samdaliri, K. Navi, R. Faghih mirzaee, S. Sam daliri, N. Bagherzadeh, "A new approach for designing compressors with a new hardware-friendly mathematical method for multi-input XOR gates" , IET Circuits Devices and Systems, Vol.10, pp.1-12, 2016.
36. M. Samdaliri, R. F., K. Navi, N. Bagherzadeh, "Ternary cyclic redundancy check by a new hardware-friendly ternary" , MICROELECTRONICS JOURNAL, Vol.54, pp.126-137, 2016.
37. M. Zomorrodi moghaddam, K. Navi, "Rotation-Based Design and Synthesis of Quantum Circuits" , JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, Vol.25, pp.1650152-1650174, 2016.
38. N. Fard, K. Navi, "Single Electron Quantum-Dot Cellular Automata A Novel Device for Nano Scale Computations" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.13, pp.4771-4777, 2016.
39. S. Daliri, J. Javidan, M. Samdaliri, K. Navi, "Design of a New High-Speed and High-Performance Full Adder Cell Based on Carbon Nanotube Field Effect Transistors" , Quantum Matter, Vol.5, pp.524-528, 2016.
40. S. Tabrizchi, H. Sharifi, F. Sharifi rostam abadi, K. Navi, "Design of Ultra Low Power Ternary Half Adder and Multiplier for Nanotechnology" , Journal of Nanoelectronics and Optoelectronics, Vol.11, pp.730-737, 2016.
41. S. Tabrizchi, H. Sharifi, F. Sharifi, K. Navi, "A Novel Design Approach for Ternary Compressor Cells Based on CNTFETs" , CIRCUITS SYSTEMS AND SIGNAL PROCESSING, Vol.35, pp.3310-3322, 2016.
42. H. Sharifi rostamabadi, S. Hamidi sangdehi, K. Navi, "A new design procedure for all-optical photonic crystal logic gates and functions based on threshold logic" , OPTICS COMMUNICATIONS, Vol.370, pp.231-238, 2016.
43. M. Kaviani, H. Sharifi, M. Dolatshahi, K. Navi, "Design of Low Voltage and High-Speed BiCMOS Buffer for Driving Large Load Capacitor" , International Journal of Engineering and Manufacturing, Vol.6, pp.1-9, 2016.
44. M. Moaiyeri, R. Chavooshi sani, A. Jalali, K. Navi, O. Hashemipour tafreshi, "Efficient Radix-r Adders for Nanoelectronics" , INTERNATIONAL JOURNAL OF ELECTRONICS, Vol.103, pp.281-296, 2016.
45. M. Moradi, K. Navi, "New Current-Mode Ternary Full Adder Circuits Based on Carbon Nanotube Field Effect Transistor Technology" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.13, pp.327-337, 2016.
46. M. Moradi, R. Faghih mirzaee, K. Navi, "New Current-Mode Multipliers by CNTFET-Based n-Valued Binary Converters" , IEICE TRANSACTIONS ON ELECTRONICS, Vol.E99.C, pp.100-107, 2016.
47. M. Samdaliri, K. Navi, M. Moaiyeri, "A New 5-Input Molecular Exclusive-OR Gate Based on Benzene Ring and Carbon Nanotube FETs" , Quantum Matter, Vol.5, pp.99-102, 2016.
48. M. Taheri, N. Shafiee, M. A., JH. A., R. S., K. Navi, "AHigh SpeedResidue-to-Binary Converter for Balanced 4-Moduli Set" , Journal Of Computing And Security, Vol.2, pp.43-54, 2016.
49. F. Sharifi rostam abadi, M. Moaiyeri, K. Navi, M. Taherkhani, "Carbon Nanotube FET-Based Decimal Decoder and Multiplexer Circuits" , Quantum Matter, Vol.4, pp.565-569, 2015.
50. F. Sharifi rostam abadi, M. Moaiyeri, K. Navi, N. Bagherzadeh, "Quaternary Full Adder Cells Based on Carbon Nanotube FETs" , Journal of Computational Electronics, Vol.14, pp.762-772, 2015.
51. F. Sharifi rostam abadi, M. Moaiyeri, K. Navi, N. Bagherzadeh, "Robust and Energy-Efficient Carbon Nanotube FET-based MVL Gates A Novel Design Approach" , MICROELECTRONICS JOURNAL, Vol.46, pp.1333-1342, 2015.
52. H. Sajedi, M. Samdaliri, K. Navi, A. Jalali, "High Performance and Low Power Half-Adder Cells in Carbon Nanotube Field Effect Transistor Technology" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.12, pp.1756-1760, 2015.
53. M. Arjmand, M. Soryani, K. Navi, "Introducing Coplanar Wire Crossing in Ternary Quantum Cellular Automata" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.12, pp.1647-1651, 2015.
54. M. Jasemi, R. Faghih mirzaee, K. Navi, N. Bagherzadeh, "Voltage mirror circuit by carbon nanotube field effect transistors for mirroring dynamic random access memories in multiple-valued logic and fuzzy logic" , IET Circuits Devices and Systems, Vol.9, pp.343-352, 2015.
55. M. Moaiyeri, M. SH., F. Sharifi rostam abadi, K. Navi, "High-Performance Ternary Logic Gates for Nanoelectronics" , International Journal of High Performance Systems Architecture, Vol.5, pp.209-215, 2015.
56. M. Reza reshadinezhad, N. Charmchi, K. Navi, "Design and Implementation of a Three-operand Multiplier through Carbon Nanotube Technology" , International Journal of Modern Education and Computer Science, Vol.7, pp.44-51, 2015.
57. N. Pounaki, M. Moaiyeri, K. Navi, N. Bagherzadeh, "An Ultra-efficient Imprecise Adder for Approximate Computing Based on CNTFET" , CSI Journal on Computer Science and Engineering, Vol.13, pp.31-37, 2015.
58. S. Angizi, S. Sayedsalehi, A. Roohi, N. Bagherzadeh, K. Navi, "Design and Verification of New n-Bit Quantum-Dot Synchronous Counters Using Majority Function-Based JK Flip-Flops" , JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, Vol.24, pp.1550153-1550170, 2015.
59. S. Hashemi, K. Navi, "A Novel Robust QCA Full-adder" , Procedia Materials Science, Vol.11, pp.376-380, 2015.
60. SH. A., M. Moaiyeri, SH. Farokhi, K. Navi, N. Bagherzadeh, "Designing Quantum-dot Cellular Automata Counters with Energy Consumption Analysis" , MICROPROCESSORS AND MICROSYSTEMS, Vol.39, pp.512-520, 2015.
61. F. Sharifi rostam abadi, M. Moaiyeri, K. Navi, "A Novel Quaternary Full Adder Cell Based on Nanotechnology" , International Journal of Modern Education and Computer Science, Vol.7, pp.19-25, 2015.
62. M. Moradi, R. Faghih mirzaee, K. Navi, "New Current-Mode Integrated Ternary Min/Max Circuits without Constant Independent Current Sources" , Journal of Electrical and Computer Engineering, Vol.2015, pp.1-11, 2015.
63. A. Rezaee, M. Masoudi, F. Sharifi rostam abadi, K. Navi, "A Novel High Speed Full Adder Cell based on Carbon Nanotube FET (CNFET)" , International Journal of Emerging Sciences, Vol.4, pp.64-74, 2014.
64. A. Roohi, H. KH., S. Seyedsalehi, K. Navi, "A symmetric quantum-dot cellular automata design for 5-input majority gate" , Journal of Computational Electronics, Vol.13, pp.701-708, 2014.
65. A. Shaahin , O. Alkhaledi, N. B., K. Navi, "Novel Robust Single Layer Wire Crossing Approach for Exclusive OR Sum of Products Logic Design with Quantum-Dot Cellular Automata" , Journal of Low Power Electronics, Vol.10, pp.259-271, 2014.
66. H. Sara, S. Rahimi azghadi, A. Zakerolhosayni, K. Navi, "A novel FPGA-programmable switch matrix interconnection element in quantum-dot cellular automata" , INTERNATIONAL JOURNAL OF ELECTRONICS, Vol.102, pp.1-22, 2014.
67. M. M., K. Navi, "Design and Evaluation of an Efficient Carbon Nano-Tube Field Effect Transistor-Based Ternary Full Adder Cell for Nanotechnology" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.11, pp.1934-1941, 2014.
68. M. Masoudi, M. Mazaheri, A. Rezaee, K. Navi, "Designing high-speed low-power full adder cells based on carbon nanotube technology" , International journal of VLSI design communication systems (VLSICS), Vol.5, pp.31-43, 2014.
69. M. Kianpour, R. Sabbaghi-nadooshan, K. Navi, "A novel design of 8-bit adder/subtractor by quantum-dot cellular automata" , JOURNAL OF COMPUTER AND SYSTEM SCIENCES, Vol.80, pp.1404-1414, 2014.
70. M. Moaiyeri, K. Navi, "Robust Carbon Nanotube Field Effect Transistor-Based Penternary Logic Circuits" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.11, pp.2055-2062, 2014.
71. M. Noorimehr, M. Hosseinzadeh, K. Navi, "Efficient Reverse Converters for 4-Moduli Sets 2 2n-1 -1 2 n 2 n 1 2 n -1 and 2 2n-1 2 2n-1 -1 2 n 1 2 n -1 Based on CRTs Algorithm" , CIRCUITS SYSTEMS AND SIGNAL PROCESSING, Vol.33, pp.3145-3163, 2014.
72. M. Zomorrodi moghaddam, K. Navi, M. Kalemati, "A novel reversible design for double edge triggered flip-flops and new designs of reversible sequential circuits" , COMPUTER SYSTEMS SCIENCE AND ENGINEERING, Vol.29, pp.197-204, 2014.
73. O. Alkhaledi, K. Navi, F. Sharifi rostam abadi, "A Novel Design Approach for Multi-input XOR Gate Using Multi-input Majority Function" , ARABIAN JOURNAL FOR SCIENCE AND ENGINEERING, Vol.39, pp.7923-7932, 2014.
74. O. Alkhaledi, K. Navi, F. Sharifi rostam abadi, M. Moaiyeri, "An ultra high-speed ( 4 2 ) compressor with a new design approach for nanotechnology based on the multi-input majority function" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.11, pp.1691-1696, 2014.
75. R. F., K. Navi, "Optimized Adder Cells for Ternary Ripple-Carry Addition" , IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, Vol.97, pp.2312-2319, 2014.
76. R. F., K. Navi, N. Bagherzadeh, "High-Efficient Circuits for Ternary Addition" , VLSI DESIGN, Vol.2014, pp.1-15, 2014.
77. S. Hashemi, K. Navi, "Reversible Multiplexer Design in Quantum-Dot Cellular Automata" , Quantum Matter, Vol.3, pp.523-528, 2014.
78. SH. A., K. Navi, S. S., A. H., "Efficient Quantum Dot Cellular Automata Memory Architectures Based on the New Wiring Approach" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.11, pp.2318-2328, 2014.
79. A. S., M. Moaiyeri, K. Navi, O. Hashemipour tafreshi, "An Efficient Versatile Logic Cell for Single-Electron Technology" , Quantum Matter, Vol.3, pp.57-60, 2014.
80. K. Navi, "Design analysis and implementation of partial product reduction phase by using wide m 3 (4 m 10) compressors" , International Journal of High Performance Systems Architecture, Vol.4, pp.231-241, 2014.
81. M. Maleknejad, R. Mirzaee, K. Navi, A. Dargahi, "A SYSTEMATIC APPROACH TO DESIGN BOOLEAN FUNCTIONS USING CNFETS AND AN ARRAY OF CNFET CAPACITORS" , JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, Vol.23, pp.1450035-1450070, 2014.
82. S. Zarhoon, M. Moaiyeri, S. Shirinabadi farahani, K. Navi, "An Efficient 5-input Exclusive-OR circuit Based on Carbon Nanotube FETs" , ETRI JOURNAL, Vol.36, pp.89-98, 2014.
83. V. Foroutan, M. Taheri, K. Navi, A. A., "Design of two Low-Power full adder cells using GDI structure and hybrid CMOS logic style" , INTEGRATION-THE VLSI JOURNAL, Vol.47, pp.48-61, 2014.
84. A. S., M. Moaiyeri, K. Navi, O. Hashemipour tafreshi, "Efficient Single-Electron Transistor Inverter-Based Logic Circuits and Memory Elements" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.10, pp.1171-1178, 2013.
85. K. Navi, A. Roohi, S. Seyedsalehi, "Designing reconfigurable quantum-dot cellular automata logic circuits" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.10, pp.1137-1146, 2013.
86. K. Navi, A. Jalali, "Designing Sustainable Nano-electronic Base Gates Using Aromatic Molecules Structures" , JOURNAL OF MOLECULAR STRUCTURE, Vol.1040, pp.246-253, 2013.
87. M. A., K. Navi, A. Kia kojoory, "Multi-output majority gate-based design optimization by using evolutionary algorithm" , Swarm and Evolutionary Computation, Vol.10, pp.25-30, 2013.
88. M. A., Y. Mahmoudi, K. Navi, "Coplanar Architecture for Quantum-Dot Cellular Automata Systolic Array Design" , Quantum Matter, Vol.2, pp.474-480, 2013.
89. M. Moaiyeri, R. F., A. Dosetaregan, K. Navi, O. Hashemipour tafreshi, "A universal method for designing low-power carbon nanotube FET-based multiple-valued logic circuits" , IET Computers and Digital Techniques, Vol.7, pp.167-181, 2013.
90. S. Hashemi, R. F., K. Navi, "New Quantum Dot Cellular Automata Cell Arrangements" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.10, pp.798-809, 2013.
91. S. Sayedsalehi, M. Moaiyeri, K. Navi, "Design of Efficient and Testable n-Input Logic Gates in Quantum-dot Cellular Automata" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.10, pp.2347-2353, 2013.
92. SH. Mehrabi, R. F., M. Moaiyeri, K. Navi, O. Hashemipour tafreshi, "CNTFET-based Designs of Energy-efficient and Symmetric 3-input Exclusive-OR and Full Adder Circuits" , ARABIAN JOURNAL FOR SCIENCE AND ENGINEERING, Vol.12, pp.3367-3382, 2013.
93. A. Roohi, S. Sayedsalehi, H. Khademalhoseini, K. Navi, "Design and Evaluation of a Reconfigurable Fault Tolerant Quantum-Dot Cellular Automata Gate" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.2, pp.380-388, 2013.
94. M. A., S. Bahrami, K. Navi, "A novel ternary quantum-dot cell for solving majority voter gate problem" , Applied Nanoscience, Vol.4, pp.255-262, 2013.
95. M. Moayeri, K. Navi, O. Hashemipour tafreshi, "Efficient CNFET-based Rectifiers for Nanoelectronics" , International Journal of Computer Applications, Vol.64, pp.21-25, 2013.
96. R. Forsati, S. Valipoor ebrahimi, K. Navi, E. Mohajerani, H. Jashnsaz, "Implementation of all-optical reversible logic gate based on holographic laser induced grating using azo-dye doped polymers" , OPTICS AND LASER TECHNOLOGY, Vol.45, pp.565-570, 2013.
97. Z. Shirinabadi farahani, S. Zarhoon, M. Moayeri, K. Navi, "An efficient cntfet-based 7-input minority gate" , International journal of VLSI design communication systems (VLSICS), Vol.4, pp.1-9, 2013.
98. A. T., M. Taheri, A. Zakerolhosayni, K. Navi, "Design of an energy Design of an energy-efficient CNFET Full Adder Cell" , International journal of computer science issues (IJCSI), Vol.9, pp.193-199, 2012.
99. A. Chabi, S. Seyedsalehi, K. Navi, "New modules for quantum-dot cellular automata AND and OR gates" , Canadian journal on electerical and electronics engineering, Vol.3, pp.200-208, 2012.
100. A. Taeb, K. Navi, M. Taheri, A. Zakerolhosayni, "Design of an energy-efficient CNFET Full Adder Cell efficient CNFET Full Adder Cell" , International journal of computer science issues (IJCSI), Vol.9, pp.193-199, 2012.
101. F. Sharifi rostam abadi, A. Momeni, K. Navi, "CNFET based basic gates and a novel full-adder cell" , International journal of VLSI design communication systems (VLSICS), Vol.3, pp.11-19, 2012.
102. K. Navi, N. H., M. Moayeri, O. Hashemipour tafreshi, "A High-Performance Hybrid Molecular Full Adder Cell" , International Review of PHYSICS (), Vol.6, pp.344-348, 2012.
103. K. Navi, S. Hashemi, "New robust QCA D flip flop and memory structures" , MICROELECTRONICS JOURNAL, Vol.43, pp.929-940, 2012.
104. M. A., K. Navi, M. Taheri, A. Molahosseini, S. Khodambashi, "Efficient RNS to binary converters for the new 4-moduli set 2n 2n 1-1 2n-1 2n-1-1" , IEICE ELECTRONICS EXPRESS (), Vol.9, pp.1-7, 2012.
105. M. A., M. Khatami, K. Navi, "Well-Polarized Quantum-dot Cellular Automata Inverters" , International Journal of Computer Applications, Vol.58, pp.10-13, 2012.
106. M. A., S. Dimitrios, H. Javashi, S. Tanos, K. Navi, "Efficient RNS Implementation of Elliptic Curve Point Multiplication Over GF(p)" , IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, pp.1-1, 2012.
107. M. Moayeri, K. Navi, O. Hashemipour tafreshi, "Design and Evaluation of CNFET-based Quaternary Circuits" , CIRCUITS SYSTEMS AND SIGNAL PROCESSING, Vol.31, pp.1631-1652, 2012.
108. M. Taheri, A. Khani, M. A., K. Navi, "Efficient Reverse Converter Design for Five Moduli set 2n 22n 1-1 2n/2 1 2n 1" , Journal of computations and modeling (JCoMod), Vol.2, 2012.
109. M. Taheri, A. Pirhossenloo, M. A., M. A., K. Navi, "High speed reverse converter for high dynamic range moduli set" , International journal of advances in engineering technology, Vol.3, pp.26-37, 2012.
110. M. Assarian, M. Haghparast, K. Navi, "Delay Reduction in Optimized Reversible Multiplier Circuit" , Research journal of applied sciences engineering and technology (), Vol.4, 2012.
111. M. Reshadinezhad, K. Navi, "High-speed Multiplier Design Using Multi-Operand Multipliers" , International journal of computer science and network (IJCSN), Vol.1, 2012.
112. M. Zomorrodi moghaddam, K. Navi, "Ultra-area-efficient reversible multiplier" , MICROELECTRONICS JOURNAL, Vol.43, pp.377-385, 2012.
113. R. Farazkish, K. Navi, "New efficient five-input majority gate for quantum-dot cellular automata" , JOURNAL OF NANOPARTICLE RESEARCH, Vol.14, pp.1-6, 2012.
114. K. Navi, S. Seyedsalehi, "A Novel Seven Input Majority Gate in Quantum-dot Cellular Automata" , International journal of computer science issues (IJCSI), Vol.9, pp.84-89, 2012.
115. M. D., O. Hashemipour tafreshi, K. Navi, "A new systematic design approach for low-power analog integrated circuits" , AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, pp.384-389, 2012.
116. M. Moayeri, R. F., K. Navi, A. Momeni, "Design and analysis of a high-performance CNFET-based Full Adder" , INTERNATIONAL JOURNAL OF ELECTRONICS, Vol.99, pp.113-130, 2012.
117. M. Moayeri, R. Chavooshisani, A. Jalali, K. Navi, O. Hashemipour tafreshi, "High-performance Mixed-Mode Universal Min-Max Circuits for Nanotechnology" , CIRCUITS SYSTEMS AND SIGNAL PROCESSING, Vol.31, pp.465-488, 2012.
118. M. Ghasemirahaghi, M. Sam, M. Moayeri, F. Khosravi, K. Navi, "A new SPICE model for organic molecular transistors and a novel hybrid architecture" , IEICE ELECTRONICS EXPRESS (), Vol.9, pp.926-931, 2012.
119. M. Reshadinezhad, M. Moayeri, K. Navi, "An Energy-Efficient full adder cell using CNFET Technology" , IEICE TRANSACTIONS ON ELECTRONICS, Vol.E95-C, 2012.
120. S. Hashemi, M. A., K. Navi, "An Efficient quantum-dot cellular automata full-adder" , Scientific research and essay, Vol.7, 2012.
121. A. P., M. Haghparast, K. Navi, "Novel design of a fast reversible Wallace sign multiplier circuit in nanotechnology" , MICROELECTRONICS JOURNAL, Vol.42, pp.973-981, 2011.
122. K. Navi, A. Dosetaregan, M. Moayeri, O. Hashemipour tafreshi, "A hardware-friendly arithmetic method and efficient implementations for designing digital fuzzy adders" , FUZZY SETS AND SYSTEMS, Vol.185, pp.111-124, 2011.
123. K. Navi, H. Hosainsagedi, R. F., M. Moayeri, A. Jalali, "High-speed full adder based on minority function and bridge style for nanoscale" , INTEGRATION-THE VLSI JOURNAL, Vol.44, pp.155-162, 2011.
124. M. A., F. Safae semnani, M. Moayeri, K. Navi, "Design and implementation of Multistage Interconnection Networks using Quantum-dot Cellular Automata" , MICROELECTRONICS JOURNAL, Vol.42, pp.913-922, 2011.
125. M. Gerami, M. A., SH. Rezaee, K. Navi, O. Hashemipour tafreshi, "Four Moduli RNS Bases for Efficient Design of Modular Multiplication" , Journal of computations and modeling (JCoMod), Vol.1, pp.73-96, 2011.
126. M. Moayeri, A. Dosetaregan, K. Navi, "Design of Energy-Efficient and Robust Ternary Circuits for Nanotechnology" , IET Circuits Devices and Systems, Vol.5, pp.285-296, 2011.
127. M. Moayeri, M. Faghih, K. Navi, O. Hashemipour tafreshi, "Efficient CNTFET-based Ternary Full Adder Cells for Nanoelectronics" , JOURNAL NANO MICRO LETTERS, Vol.3, pp.43-50, 2011.
128. M. Moradi, K. Navi, "Performance Analysis of 3 Improved Modified 1-Bit Full Adder Cells Based on CNTFET Technology" , EUROPEAN JOURNAL OF SCIENTIFIC RESEARCH , Vol.62, pp.588-599, 2011.
129. M. Ghasemirahaghi, M. Moayeri, K. Navi, "A NEW FULL ADDER CELL FOR MOLECULAR ELECTRONICS" , International journal of VLSI design communication systems (VLSICS), Vol.2, pp.1-13, 2011.
130. M. Rashtian, O. Hashemipour tafreshi, K. Navi, A. Jalali, "A new switched opamp approach for improving the operation of auto-reset switched-capacitor filters" , JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, Vol.20, pp.835-848, 2011.
131. R. F., M. Moayeri, H. Khoorsand rahim zadeh, K. Navi, "A New Robust and High-performance Hybrid Full Adder Cell" , JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, Vol.20, pp.641-655, 2011.
132. S. Seyedsalehi, M. Moayeri, K. Navi, "Novel Efficient Adder Circuits for Quantum-Dot Cellular Automata" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.8, pp.1-7, 2011.
133. SH. Rezaee, M. A., M. Gerami, K. Navi, O. Hashemipour tafreshi, "High Dynamic Range RNS Bases for Modular Multiplication" , International journal of computer science issues (IJCSI), Vol.8, pp.69-73, 2011.
134. K. Navi, A. S., M. A., "How to Teach Residue Number System to Computer Scientists and Engineers" , IEEE TRANSACTIONS ON EDUCATION, Vol.54, pp.156-163, 2011.
135. K. Navi, M. A., A. S., "A General Reverse Converter Architecture with Low Complexity and High Performance" , IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, pp.264-273, 2011.
136. M. A., SH. Rezaee, M. Gerami, K. Navi, "On the design of RNS bases for modular multiplication" , International Journal of Network Security, Vol.0, pp.1-10, 2011.
137. M. Haghparast, K. Navi, "NOVEL REVERSIBLE FAULT TOLERANT ERRORCODING AND DETECTION CIRCUITS" , INTERNATIONAL JOURNAL OF QUANTUM INFORMATION, Vol.9, pp.723-738, 2011.
138. M. Moayeri, A. Jahanian, K. Navi, "Comparative Performance Evaluation of Large FPGAs with CNFET- and CMOS based Switches in Nanoscale" , JOURNAL NANO MICRO LETTERS, Vol.3, 2011.
139. R. M., H. S., A. Nayebi, K. Navi, "Modeling the effects of hot-spot traffic load on the performance of wormhole-switched hypermeshes" , COMPUTERS and ELECTRICAL ENGINEERING, Vol.37, pp.1-23, 2011.
140. A. S., K. Navi, S. Timarchi, "Efficient Reverse Converter Designs for the New 4-Moduli Sets 2 n 1 2 n 2 n 1 2 2n 1 1 and 2 n 1 2 n 1 2 2n 2 2n 1 Based on New CRTs" , IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, Vol.57, pp.823-835, 2010.
141. A. S., K. Navi, S. Timarchi, "Efficient Reverse Converter Designs for the New 4-Moduli Sets 2n 1 2n 2n 1 22n 1 1 and 2n 1 2n 1 22n 22n 1 Based on New CRTs" , IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, Vol.57, pp.823-835, 2010.
142. K. Navi, F. Sharifi rostam abadi, A. Momeni, P. Keshavarzian, "Ultra High Speed CNFET Full-Adder Cell based on Majority Gates" , IEICE TRANSACTIONS ON ELECTRONICS, Vol.E93, 2010.
143. K. Navi, M. R., A. KH., P. Keshavarzian, O. Hashemipour tafreshi, "High speed capacitor -inverter based carbon nanotube full adder" , Nanoscale Research Letters, Vol.5, pp.859-862, 2010.
144. K. Navi, R. F., S. S., M. R., "A new quantum-dot cellular automata full-adder" , MICROELECTRONICS JOURNAL, Vol.41, pp.820-826, 2010.
145. K. Navi, S. S., R. F., M. R., "Five-Input Majority Gate a New Device for Quantum-Dot Cellular Automata" , JOURNAL OF COMPUTATIONAL AND THEORETICAL NANOSCIENCE, Vol.7, pp.1546-1553, 2010.
146. M. A., K. Navi, M. Taheri, "High Speed reverse converter for new five-moduli set 2 n 2 2n 1 -1 2 n/2 -1 2 n/2 1 2 n 1" , IEICE ELECTRONICS EXPRESS (), Vol.7, pp.118-125, 2010.
147. M. M., K. Navi, "A New Full-Adder Based on Majority Function and Standard Gates" , Journal of communication and computer, Vol.7, 2010.
148. M. Moayeri, R. F., K. Navi, T. N., "Novel direct designs for 3-input XOR function for low-power and high-speed applications" , INTERNATIONAL JOURNAL OF ELECTRONICS, Vol.97, pp.647-662, 2010.
149. M. R., O. Hashemipour tafreshi, K. Navi, A. Jalali, "A NOVEL STRUCTURE FOR REALIZATION OF A PSEUDO TWO PATH BAND-PASS FILTER" , International Journal of Engineering, Vol.23, pp.201-208, 2010.
150. S. B., A. M., K. Navi, "A High Speed RNS to Binary Converter Based on Moduli Set 22n 22n 2n 1 2n-1" , International journal of computer sciences and engineering systems, Vol.4, 2010.
151. S. Bakhshayesh, A. M., K. Navi, "A High Speed RNS to Binary Converter Based on Moduli Set 2 2n 2 2n 2 n 1 2 n-1" , International journal of computer sciences and engineering systems, Vol.4, 2010.
152. T. Nikoobin boroojeni, P. B., S. P., K. Navi, F. Vaez iravani, "Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits" , VLSI DESIGN, Vol.2010, 2010.
153. K. Navi, R. Sharifirad, M. Moayeri, A. Momeni, "A LOW VOLTAGE AND ENERGY EFFICIENT FULL ADDER CELL BASED ON CARBON NANOTUBE TECHNOLOGY" , JOURNAL NANO MICRO LETTERS, Vol.2, pp.114-120, 2010.
154. M. J., F. Sharifi rostam abadi, K. Navi, O. Hashemipour tafreshi, "Five new mvl current mode differential absolute valve circuits based on carbon nano-tube field effect transistors (cntfets)" , JOURNAL NANO MICRO LETTERS, Vol.2, 2010.
155. K. Navi, M. Maeen, O. Hashemipour tafreshi, "An energy efficient full adder cell for low voltage" , IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, Vol.6, pp.553-559, 2009.
156. M. Mohammadi, M. Haghparast, M. Eshghi, K. Navi, "MINIMIZATION AND OPTIMIZATION OF REVERSIBLE BCD FULL ADDER SUBTRACTOR USING GENETIC ALGORITHM AND DONT CARE CONCEPT" , INTERNATIONAL JOURNAL OF QUANTUM INFORMATION, Vol.7, pp.969-989, 2009.
157. S. Timarchi, K. Navi, "Arithmetic Circuits of Redundant SUT-RNS" , IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, Vol.58, pp.2959-2968, 2009.
158. A. M., K. Navi, "A NEW FIVE MODULI SET FOR EFFICIENT HARDWARE IMPLENTION OF THE REVERSE CONVERTER" , IEICE ELECTRONICS EXPRESS (), Vol.6, pp.1006-1012, 2009.
159. A. M., K. Navi, M. Eshghi, "EFFICIENT MRC BASED RESIDUE TO BINARY CONVERTERS FOR THE NEW MODULI SETS (2 2-1 2N 1 -1 ) AND (22N 2N -1 2N-1 -1)" , IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2009.
160. K. Navi, A. Momeni, F. Sharifi rostamabadi, "TWO NOVEL ULTRA HIGH SPEED CARBON NANOTUBE FULL ADDER CCELLS" , IEICE ELECTRONICS EXPRESS (), Vol.6, pp.1395-1401, 2009.
161. K. Navi, M. Hosseinzadeh, R. Farshidi, "High speed residue number system comparison for the moduli set 2n-1 2n 2n 1" , Journal of communication and computer, Vol.6, 2009.
162. K. Navi, M. Moayeri, R. F., O. Hashemipour tafreshi, B. Mazloomnejad meybodi, "Two new low-power full adders based on mafority-not gates" , MICROELECTRONICS JOURNAL, Vol.40, pp.126-130, 2009.
163. K. Navi, M. Mohammadhosein, "Two new low-power and high-performance full addres" , Journal of Computers, Vol.4, 2009.
164. K. Navi, M. S., A. D., "A high-speed hybrid full adder" , EUROPEAN JOURNAL OF SCIENTIFIC RESEARCH , Vol.26, pp.29-33, 2009.
165. K. Navi, M. Eshghi, A. M., "Efficient MRC-Based Residue to Binary Converters For the New Moduli Sets (22n 2n-1 2n 1-1) and (22n 2n-1 2n-1-1)" , IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, Vol.92, 2009.
166. K. Navi, N. Soheili, "A novel five-input configurable cell based on irreversible single electron box" , Contemporary engineering sciences, Vol.2, pp.149-163, 2009.
167. K. Navi, S. Timarchi, "A new algorithm for determining all possible symmetric hybrid redundant numbers" , IEICE ELECTRONICS EXPRESS (), Vol.6, 2009.
168. K. Navi, V. Foroutan, M. A., G. Ebrahimipour, CH. CH., "A NOVEL LOW POWER FULL CELL WITH NEW TECHNIQUE IN DESIGNING LOGICAL GATES BASED ON STATIC CMOS INVERTER" , MICROELECTRONICS JOURNAL, Vol.40, pp.1441-1448, 2009.
169. M. A., K. Navi, "HIGH SPEED REVERSE CONVERTER FOR NEW" , IEICE ELECTRONICS EXPRESS (), Vol.7, pp.118-125, 2009.
170. M. Eshghi, K. Navi, M. Mohammadi, M. Haghparast, "Ptimization of reversible BCD-Full adder /subtractor using genetic algorithm and don t care concept" , INTERNATIONAL JOURNAL OF QUANTUM INFORMATION, Vol.7, pp.969-989, 2009.
171. M. Geraeilootanha, T. Nikoobin boroojeni, K. Navi, "ENERGY CONSUMPTION OPTIIZATION FOR BASIC ARITHMETIC CIRCUITS WITH TRANSISTOR SIZING BASED ON GENETIC ALGORITHM" , International Journal of Recent Trends in Engineering (IJRTE, Vol.1, 2009.
172. M. Maeen, V. Foroutan, K. Navi, "ON THE DESIGN OF LOW POWER 1 BIT FULL ADDER CELL" , IEICE ELECTRONICS EXPRESS (), Vol.6, pp.1148-1154, 2009.
173. P. Keshavarzian, K. Navi, "UNIVERSAL TERNARY LOGIC CIRCUIT DESIGN THROUGH CARBON NANOTUBE TECHNOLOGY" , International Journal of Nanotechnology, Vol.6, 2009.
174. S. Timarchi, K. Navi, "ARITHMETIC CIRCUITS OF REDUNDANT SUT RNS" , IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, Vol.58, 2009.
175. T. Nikoobin boroojeni, F. Eslami, A. Baniasad, K. Navi, "A NEW CELL DESIGN METHODOLOGY FOR BALANCED XOR XNOR CIRCUITS FOR HYBRID CMOS LOGIC" , Journal of Low Power Electronics, Vol.5و1, 2009.
176. A. S., K. Navi, O. Hashemipour tafreshi, A. Jalali, "An efficient architecture for designing reverse converters based on a general three-moduli set" , JOURNAL OF SYSTEMS ARCHITECTURE, Vol.54, pp.929-934, 2008.
177. K. Navi, "High-performance bridge-style full adder structure" , The smithsonian/NASA astrophysics data system, 2008.
178. K. Navi, A. M., O. Hashemipour tafreshi, A. Jalali, "An efficient architecture for designing reverse converters based on a general" , JOURNAL OF SYSTEMS ARCHITECTURE, Vol.54, pp.929-934, 2008.
179. K. Navi, H. Moayeri, "High speed np-cmos and nmulti-output dymamic full adder cells" , COMPUTER SYSTEMS SCIENCE AND ENGINEERING, Vol.4, 2008.
180. K. Navi, J. Foroutan, B. Mazloomnejad meybodi, SH. B., O. Hashemipour tafreshi, "A six transistors full adder" , WORLD APPLIED SCIENCES JOURNAL , Vol.4, pp.142-149, 2008.
181. K. Navi, N. KH., "The design of a High-performance full adder cell by combining common digital gates and mafority function" , EUROPEAN JOURNAL OF SCIENTIFIC RESEARCH , Vol.23, pp.627-639, 2008.
182. K. Navi, P. Keshavarzian, "Efficient carbon nanotube galois field circuit design" , IEICE ELECTRONICS EXPRESS (), Vol.6, pp.546-552, 2008.
183. K. Navi, R. F., M. Moayeri, B. Mazloomnejad meybodi, O. Hashemipour tafreshi, "Ultra high speed full adders" , IEICE ELECTRONICS EXPRESS (), Vol.5, pp.744-749, 2008.
184. K. Navi, R. Zabihi, M. Haghparast, "A novel mixed mode current and dynamic voltage full adder" , WORLD APPLIED SCIENCES JOURNAL , Vol.4, pp.289-294, 2008.
185. K. Navi, S. Timarchi, "Improved modulo 2n 1 adder design" , International journal of computer and information science and engineerin, Vol.3, 2008.
186. K. Navi, S. Afjei, H. Khoorsand rahim zadeh, "Minimization of Multiple Valued Decision Diagrams Based on Matrix Computation" , AMERICAN JOURNAL OF APPLIED SCIENCES (), Vol.5, pp.158-164, 2008.
187. K. Navi, V. Foroutan, "A novel low-power full-adder cell for low voltage" , INTEGRATION-THE VLSI JOURNAL, Vol.-, 2008.
188. M. Haghparast, K. Navi, M. Mohammadi, "Optimized reversible multiplier circuit" , JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, Vol.18, pp.311-323, 2008.
189. M. Haghparast, M. Mohammadi, K. Navi, M. Eshghi, "Optimized reversible multipllier circuit" , JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2008.
190. M. Hosseinzadeh, K. Navi, M. A., "An i proved reverse converter for the moduli set 2n-1 2n 2n 1 2n 1-1" , IEICE ELECTRONICS EXPRESS (), Vol.5, pp.672-677, 2008.
191. M. R., O. Hashemipour tafreshi, K. Navi, "Design of a low-voltage high-speed switched-capacitor filters using improved auto zeroed integrator" , JOURNAL OF APPLIED SCIENCES, Vol.8, pp.1771-1775, 2008.
192. M. Haghparast, S. Jafari, O. Hashemipour tafreshi, K. Navi, "Design of a novel reversible multiplier circuit using HNG gate in nonotechnology" , WORLD APPLIED SCIENCES JOURNAL , Vol.3, pp.974-978, 2008.
193. M. Sharifi, K. Navi, "Physic-based imaginary potential and incoherent current models for RTD simulation using optical model" , JOURNAL OF APPLIED SCIENCES, Vol.8, pp.1028-1034, 2008.
194. M. Sharifi, K. Navi, "The Effect of Quantum Interferences on Emitter Current of Resonant Tunneling Diode" , WORLD APPLIED SCIENCES JOURNAL , Vol.3, pp.969-973, 2008.
195. S. D., K. Navi, "A novel current mode full adder based on majority function" , WORLD APPLIED SCIENCES JOURNAL , Vol.4, pp.676-680, 2008.
196. A. M., H. Sarbazi azad, E. Khodaie, K. Navi, "Parallel Lagrange interpolation on k-ary n-cubes with maximum channel utilization" , JOURNAL OF SUPERCOMPUTING, 2008.
197. K. Navi, "Low Power and High Performance 1-bit CMOS Full Adder Cell" , Journal of Computers, Vol.3, pp.48-54, 2008.
198. K. Navi, A. Sabbagh, "A High Speed and Low Cost Residue to Binary Converter Based on a New Moduli Set" , Journal of automation and system engineering, Vol.1, 2008.
199. K. Navi, A. Hariri, R. Rastegar, "A new high dynamic range moduli set with efficient reverse converter" , COMPUTERS and MATHEMATICS WITH APPLICATIONS, Vol.35, pp.660-668, 2008.
200. K. Navi, M. Haghparast, "A Novel Fault Tolerant Reversible Gate For Nanotechnology Based Systems" , AMERICAN JOURNAL OF APPLIED SCIENCES (), Vol.5, pp.519-523, 2008.
201. K. Navi, M. Haghparast, "A Novel Reversible BCD Adder For Nanotechnology Based Systems" , AMERICAN JOURNAL OF APPLIED SCIENCES (), Vol.5, pp.282-288, 2008.
202. K. Navi, M. Haghparast, "Design of a Novel Fault Tolerant Reversible Full Adder for Nanotechnology Based Systems" , WORLD APPLIED SCIENCES JOURNAL , Vol.3, pp.114-118, 2008.
203. K. Navi, S. Timarchi, "Low Power Modulo 2 (n) 1 Adder Based on Carry Save Diminished-One Number System" , AMERICAN JOURNAL OF APPLIED SCIENCES (), Vol.5, pp.312-319, 2008.
204. M. Sharifi, K. Navi, "Physic Based Imaginary Potential and Incoherent Current Models for RTD Simulation Using Optical Model" , JOURNAL OF APPLIED SCIENCES, Vol.8, pp.1028-1034, 2008.
205. S. Timarchi, K. Navi, "Low Power Modulo 2n 1 Adder Based on Carry Save Diminished-One Number System" , AMERICAN JOURNAL OF APPLIED SCIENCES (), Vol.4, pp.312-319, 2008.
206. K. Navi, "A fully parallel reverse converter" , International Journal of Electrical Computer and Systems Engineering, Vol.1, pp.183-187, 2007.
207. K. Navi, A. GH., O. Hashemipour tafreshi, "High Speed Full Swing Current Mode Bicmos Logical Operators" , International journal of electronics Transaction A Basics, Vol.20, 2007.
208. K. Navi, M. Haghparast, "A Novel Reversible Full Adder Circuit for Nanotechnology Based Systems" , JOURNAL OF APPLIED SCIENCES, Vol.7, pp.3995-4000, 2007.
209. K. Navi, M. Hosseinzadeh, "A New Moduli Set for Residue Number System in Ternary Valued Logic" , JOURNAL OF APPLIED SCIENCES, Vol.7, pp.3729-3735, 2007.
210. K. Navi, P. Asadi, "A New Low Power 32*32 bit Multiplier" , JOURNAL OF APPLIED SCIENCES, Vol.2, pp.341-347, 2007.
211. K. Navi, P. Asadi, "A New High Speed Low Power Consumption Multiplier" , JOURNAL OF APPLIED SCIENCES, Vol.7, pp.2629-2634, 2007.
212. K. Navi, P. Asadi, "A Novel High Speed 54*54 bit Multiplier" , AMERICAN JOURNAL OF APPLIED SCIENCES (), Vol.4, pp.666-672, 2007.
213. K. Navi, S. Rahimi azghadi, "A Novel Design for Quantum-dot Cellular Automata Cells and Full Adders" , AMERICAN JOURNAL OF APPLIED SCIENCES (), Vol.7, pp.3460-3468, 2007.
214. K. Navi, T. Nikoobin boroojeni, "ارائه الگوريتم نوين ساده سازي DCVS بر پايه قانون جديد تزويج سطوح" , pp.59-66, 2007.
215. K. Navi, A. GH., "Arithmetic Operators Introducing Full Swing High Speed Current Mode BiCMOS Technology" , Mathematical Problems of Computer Science Transaction, Vol.4, pp.75-87, 2007.
216. K. Navi, A. Sabbagh, "New Arithmetic Residue to Binary Converters" , International journal of computer sciences and engineering systems, Vol.1, pp.295-299, 2007.
217. K. Navi, M. Hosseinzadeh, S. J., "A Novel Multiple Valued Logic OHRNS Modulo r n Adder Circuit" , International journal of electronics circuits and systems, Vol.1, pp.245-249, 2007.
218. R. M., H. S., A. Nayebi, K. Navi, "Performance Modeling of Wormhole Hypermeshes Under Hotspot Traffic" , LECTURE NOTES IN ARTIFICIAL INTELLIGENCE, Vol.4649, pp.290-302, 2007.
219. K. Navi, "Application of car active suspension in vertical acceleration reduction of vehicle due to road excitation and its effect on human health" , Vol.16, pp.429-434, 2006.
220. K. Navi, "Arithmetic Operators Introducing Full Swing High Speed Current-Mode BiCMOS" .
221. M. Samdaliri, S. Sam daliri, A. Bozorgmehr, K. Navi, "Novel quaternary operator for cyclic redundancy check on Xilinx FPGAs" , CSI Journal on Computer Science and Engineering.
222. R. Faghi mirzaee, M. Samdaliri, K. Navi, N. Bagherzadeh, "A single parity-check digit for one trit error detection in ternary communication systems gate -level and transistor-level designs" , JOURNAL OF MULTIPLE-VALUED LOGIC AND SOFT COMPUTING.
223. ك. ناوي, "متدي جديد در شناسايي رفتار زماني مدارهاي XOR/XNOR بالانس" , علوم و مهندسي كامپيوتر(انجمن كامپيوتر ايران), نسخه 5, صفحات:45-59, 1387.
224. ا. هاشمي پورتفرشي, م. رشتيان, ك. ناوي, "طراحي يك فيلتر پايين گذر چبي شف درجه چهارم سوييچ خازني با ساختار انتگرال گير خود صفر شونده در ولتاژ تغذيه 2/1 ولت" , مهندسي برق و مهندسي كامپيوتر ايران, نسخه 3, صفحات:178-182, 1386.
225. ك. ناوي, "طراحي كمپرسور 2-4 با قابليت مكمل دو مد جريان" , نشريه علمي پژوهشي انجمن كامپيوتر ايران, نسخه 1 (الف), صفحات:30-37, 1385.
226. ك. ناوي, م. كاظمي پارسا, آ. قربان نيا دلاور, "دروازه هاي منطقي بسيار سريع مدجريان" , نشريه علمي پژوهشي انجمن كامپيوتر ايران, نسخه 3, صفحات:45-50, 1384.
227. ك. ناوي, "كمپرسور 2-4 سريع مد مشترك" , نشريه علمي پژوهشي انجمن كامپيوتر ايران.


Conference Articles
1. A. Bozorgmehr, M. Moaiyeri, K. Navi, "Multi-Input Fuzzy Min/Max Circuits Based on Carbon Nanotube FETs" , In The third international conference on Intelligent Decision Science, 2018.
2. A. Bozorgmehr, A. Kargaran dehkordi, K. Navi, "High speed low power and approximated current mode XOR in secure image applications based on CNT" , In 19th CSI International Symposium on Computer Architecture and Digital Systems (CADS17), 2017.
3. M. Bagherian khosroshahy, M. Moaiyeri, K. Navi, "Design and Evaluation of a 5-Input Majority Gate-Based Content-Addressable Memory Cell in Quantum-Dot Cellular Automata" , In 19th CSI International Symposium on Computer Architecture and Digital Systems (CADS17), 2017.
4. M. Mona, F. Reza, K. Navi, "Ternary Versus Binary Multiplication with Current-Mode CNTFET-Based K-Valued Converters" , In IEEE International Symposium, 2016.
5. M. Hosseinzadeh, L. Sousa, A. Sabbagh molahosseini, A. Emrani zarandi, K. Navi, "Area-delay-power-aware adder placement method for RNS reverse converter design" , In 2016 IEEE 7th Latin American Symposium on Circuits Systems (LASCAS), 2016.
6. R. F., M. Moaiyeri, M. M., K. Navi, O. Hashemipour tafreshi, "Dramatically Low-Transistor-Count High-Speed Ternary Adders" , In IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2013.
7. A. Roohi, H. Khademolhosseini, S. Seyedsalehi, K. Navi, "Implementation of reversible logic design in nanoelectronics on basis of majority gates" , In International Symposium on Computer Architecture and Digital Systems (CADS), 2012.
8. K. Navi, M. Moaiyeri, "An applicable high-efficient CNTFET-based full adder cell for practical environments" , In International Symposium on Computer Architecture and Digital Systems (CADS), 2012.
9. M. Ghasemirahaghi, M. Moaiyeri, K. Navi, "Analytical performance evaluation of molecular logic circuits" , In International Symposium on Computer Architecture and Digital Systems (CADS), 2012.
10. K. Navi, "A novel combinational logic optimization for majority Gate-based Nanoelectronic Circuits Based on jenetic Algorithm" , 2011.
11. A. Dosetaregan, M. Moaiyeri, K. Navi, O. Hashemipour tafreshi, "On the design of new low-power CMOS standard ternary logic gates" , In CSI Internationa Symposium on Computer Architecture and Digital Systems(CADS), 2010.
12. R. Farazkish, F. Khodaparast, K. Navi, A. Jalali, "Design and characterization of a novel inverter for nanoelectronic circuits" , In International Conference on Nanotechnology Fundamentals and Applications, 2010.
13. A. M., S. Sezavar dokht farooghi, K. Navi, "A NEW DESIGN OF REVERSE CONVERTER FOR A THREE MODULI SET" , In Ieee 2009, 2009.
14. S. Sepahvandi, M. Hosseini zadeh, K. Navi, A. Jalali, "An improved exponentiation algorithm for RSA cryptosystem" , In International Conference on Research Challenges in Computer Science, 2009.
15. S. Timarchi, K. Navi, "MAXIMALLY REDUNDANT HIGH RADIX SIGNED DIPIT ADDER NEW ALGORITHM AND IMPLEMENTATION" , In Ieee 2009, 2009.
16. K. Navi, "A new residue to binary converter based on mixed-radix conversion" , In 3rd International conference on publication data ICTTA 2008, 2008.
17. K. Navi, "Design of robust and high-performance 1-bit CMOS full ader for nanometer" , In IEEE computer society annual symposium on VLSI, 2008.
18. K. Navi, "Efficient ternary gaois field circuit design through carbon nanotube technology" , In 3rd International conference on publication data ICTTA 2008, 2008.
19. M. R., O. Hashemipour tafreshi, K. Navi, "A novel structure for realization of a pseudo two path band-pass filter" , In 2008 26th international conference on microelectronics, 2008.
20. M. Bonyadi, S. A., N. Rad, K. Navi, S. Afjei, "Logic Optimization for Majarity Gate-Based Nanoelectroic Circuits Based on Genetic Algorithm" , In 2nd International Conference on Electical Engineering(ICEE 2007), 2007.
21. S. Afjei, K. Navi, SH. Ataei, "A New Two Phase Configuration for Switched Reluctance Motor with High Starting Torque" , In The Seventh International Conference on Power Electronics and Drive Systems, 2007.
22. K. Navi, "New Current -Mode Galois Field Multiplier" , In Csicc 2007, 2007.
23. K. Navi, O. Kavehie, M. Rouholamini, S. Sahafi, S. Mehrabi, "A Novel CMOS Full-Adder" , In 20th International IEEE Conference on VLSI Design and 6th International Conference on ES Design, 2007.
24. K. Navi, "New Design of RNS Subtractor for modulo ( 2n 1 )" , In 2nd IEEE International Conference on Information Communication Technologies From Theory to Applications, 2006.
25. K. Navi, M. Hosseinzadeh, S. Timarchi, "Design Circuit Residue Number System in Current mode" , In 14th Iranian Conference of Electrical Engineering, 2006.
26. K. Navi, M. Hosseinzadeh, S. Timarchi, "New Design of RNS High Speed Multi Operand Adder" , In 14th Iranian Conference of Electrical Engineering, 2006.
27. K. Navi, O. Kavehie, A. Mirbaha, N. Dadkhahi, "Novel Architecture for IEEE-754 Standard" , In 2nd IEEE International Conference on Information Communication Technologies From Theory to Applications, 2006.
28. K. Navi, O. Kavehie, M. Helmi, R. Moraveji, "Multiple-valued Interconnection Network" , In 2nd IEEE International Conference on Information Communication Technologies From Theory to Applications, 2006.
29. K. Navi, O. Kavehie, T. Nikoubin, M. Rouholamini, "A New Algorithm for nFET-Tree Reduction" , In IEEE International Symposium on Parallel Computing in Electrical Engineering PARELEC 06, 2006.
30. K. Navi, O. Kavehie, T. Nikoubin, M. Rouholamini, "A Novel DCVS Tree Reduction Algorithm" , In 2nd IEEE International Conference on Information Communication Technologies From Theory to Applications, 2006.
31. K. Navi, P. Asadi, A. Mirbaha, O. Kavehie, "High-Speed Arithmetic Algorithms for Multiple-valued Logics in Mixed-Mode" , In 2nd IEEE International Conference on Information Communication Technologies From Theory to Applications, 2006.
32. K. Navi, S. Bahrami, S. Bakhtiari, "Ultra high speed Saturating Counter" , In 14th Iranian Conference of Electrical Engineering, 2006.
33. K. Navi, S. Sharifi sede, R. Sharifi sede, "Reducing Harmful Effects Of Road Excitations On Human Health By Designing Car Active Suspension Systems" , In The 2006 International Conference on Bioinformatics and Computational Biology, 2006.
34. K. Navi, S. Sharifi sede, R. Sharifi sede, "Using Car Semi-active Suspension Systems to Decrease Undesirable Effects of road excitations on Human Health" , In The 2006 International Conference on Bioinformatics and Computational Biology, 2006.
35. A. GH., K. Navi, "VERY FAST CURRENT_MODE LOGIC GATES" , In CSIT Conference 2005, 2005.
36. A. Hariri, K. Navi, R. Rastegar, "A SIMPLIFIED MODULO(2n-1)squaring scheme for residue number system" , In IEEE Eurocon, 2005.
37. K. Navi, "A novel 54x54-bit scalable multiplier architecture" , In The 13th Iranian Conference on Electrical Engineering (ICEE 2005), 2005.
38. K. Navi, A. Ghorbannia delavar, "Very fast current mode logic gates" , In CSIT Conference 2005, 2005.
39. K. Navi, A. Hariri, R. Rastegar, "A Simplified Modulo (2n-1) Squaring Scheme for Residue Number System" , In The International IEEE Conference on Computer as a Tool 2005. EUROCON 2005, 2005.
40. K. Navi, A. Hariri, R. Rastegar, M. Zamani, M. Meybodi, "Cellular learning automata based evolutionary computing (CLA-EC) for intrinsic hardware evolution" , In 2005 IEEE NASA/DoD Conference on Evolvable Hardware 2005. Proceedings, 2005.
41. K. Navi, O. Kavehie, "A New Design for 27 2 Compressor" , In 10th Annual Computer Society of Iran Computer Conf., 2005.
42. K. Navi, A. Arfaee, A. Akbari, H. Noori, "Implementation of a fast MAC for a GSM vocoder" , In Proceedings of 9th Iranian conference on Electrical engineering, 2001.
43. K. Navi, D. Etiemble, "From multivalued current mode CMOS circuits to efficient voltage mode CMOS arithmetic operators" , In 25th IEEE International Symposium on Multiple-Valued Logic 1995. Proceedings, 1995.
44. K. Navi, A. Kazeminejad, D. Etiemble, "CML current mode full adders for 2.5-V power supply" , In Twenty-Fourth IEEE International Symposium on Multiple-Valued Logic 1994. Proceedings, 1994.
45. K. Navi, A. Kazemnejad, D. Etiemble, "Performance of CMOS current mode full adders" , In Twenty-Fourth IEEE International Symposium on Multiple-Valued Logic 1994. Proceedings, 1994.
46. K. Navi, D. Etiemble, "A basis for the comparison of binary and m-valued current mode circuits the multioperand addition with redundant number systems" , In Twenty-Third IEEE International Symposium on Multiple-Valued Logic, 1993.
47. K. Navi, D. Etiemble, "Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system" , In 11th IEEE Symposium on Computer Arithmetic, 1993.
48. K. Navi, "A new moduli set for residue nimber system" .
49. K. Navi, "Logic Optimization for Majority Gate-Based Nanoelectronic Circuits Based on Genetic Algorithm" .
50. K. Navi, "Optimum quatenary galois field circuit design through carbon nono tube technology" .
51. K. Navi, "Reliable on-chipcommunication by multi-level redundant residue number system" .
52. م. معيري, ك. ناوي, "طراحي سلول هاي تمام جمع كننده تك بيتي با قابليت اطمينان و كارايي بالا" چهاردهمين كنفرانس ملي سالانه كامپيوتر انجمن كامپيوتر ايران, 1387.
53. م. رشتيان, ا. هاشمي پورتفرشي, ك. ناوي, "طراحي يك نمونه بردار و نگهدارنده دقيق به كمك تقويت كننده سوييچ شونده" شانزدهمين كنفرانس مهندسي برق ICEE 2008, 1387.
54. ك. ناوي, "، الگوريتم جديد سايزبندي ترانزيستور براي مدارات XOR/XNOR بالانس" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
55. ك. ناوي, "، سيستم اعداد مانده اي چند سطحي وان هات" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
56. ك. ناوي, "A Novel Modulo 2 n 1 Adder Scheme" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
57. ك. ناوي, "ارائه معماري نوين ضرب كننده با استفاده از مدل سيستم Multi-expert براي كاربرد هاي سريع" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
58. ك. ناوي, "اريگامي و الگوريتمهاي رمزنگاري" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
59. ك. ناوي, "الگوريتم طراحي XOR هاي با تعداد ورودي متغير با استفاده از ساختار پل" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
60. ك. ناوي, "درخت Wallace با استفاده از جمع كننده هاي بر اساس تسهيم كننده" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
61. ك. ناوي, "ساخت دروازهه هاي منطقي مختلط با دو خروجي همزمان مد ولتاژ و مد جريان" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
62. ك. ناوي, "سيستم اعداد مانده اي چند سطحي با مجموعه پيمانه (2 n 2 n-1 2 (n-1)-1)" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
63. ك. ناوي, "طراحي جديد مدار XOR / XNOR شش ترانزيستوري با تكيه بر طراحي زنجيره هاي كم مصرف و پرسرعت مدارهاي حسابي" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
64. ك. ناوي, "طراحي جمع كننده با انتشار معكوس رقم نقلي در مد ولتاژ" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
65. ك. ناوي, "طراحي شبكه هاي پايين بر بهينه DCVS با استفاده از مفهوم توابع هم ارز" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
66. ك. ناوي, "طراحي شمارنده هاي اشباع شونده بسيار سريع با استفاده از ابزارهاي تك الكتروني" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
67. ك. ناوي, "طراحي واحد MAC با استفاده از تسهيم كننده هاي ترانزيستور عبور" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
68. ك. ناوي, "طراحي وپياده سازي جديدي از مدارات مد جريان سيستم اعداد مانده اي با پيمانه متغير" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
69. ك. ناوي, "معكوس كننده هاي سه مقداري بسيار سري" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
70. ك. ناوي, ا. هاشمي پورتفرشي, س. گرگين, "معكوس كننده هاي سه مقداري بسيار سريع" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
71. ك. ناوي, م. شريفي, د. بهره پور, م. يعقوبي, "طراحي شمارنده هاي اشباع شونده بسيار سريع با استفاده از ابزارهاي تك الكتروني" دوازدهمين كنفرانس بين المللي انجمن كامپيوتر ايران, 1385.
72. ك. ناوي, ا. كاوه اي, "جمع كننده سريع CMOS" چهاردهمين كنفرانس مهندسي برق ايران, 1385.
73. ك. ناوي, آ. منصوري, "طراحي مبناي 3 مدار تمام جمع كننده م د جريان دو جهته" يازدهمين كنفرانس انجمن كامپيوتر ايران, 1384.
74. ك. ناوي, ا. كاوه اي, پ. اسدي, "كمپرسور 2-4 سريع مدمشترك" يازدهمين كنفرانس بين المللي كامپيوتر ايران, 1384.
75. ك. ناوي, س. تيمارچي, م. حسين زاده, "طراحي جديد تفريق كننده RNS براي پيمانه1 2n" يازدهمين كنفرانس انجمن كامپيوتر ايران, 1384.
76. ك. ناوي, م. حسين زاده, س. تيمارچي, "طراحي جديد VLSI براي كمپرسور 3-4" يازدهمين كنفرانس انجمن كامپيوتر ايران, 1384.
77. ك. ناوي, "A New Design for 7 2 Compressors" .
78. ك. ناوي, "الگوريتم ضرب سريع پيمانه اي" .
79. ك. ناوي, "ضرب كننده سريع CMOS با مصرف توان كم" .


Shahid Beheshti University

Shahid Beheshti University